1. Field
Exemplary embodiments of the present invention relate to a semiconductor device for determining abnormality of a through silicon via (TSV) through an AC signal transfer characteristic and an operating method of the semiconductor device.
2. Description of the Related Art
Recently, there are continuous needs for high-speed, high-density and low power consumption for a semiconductor memory. In order to satisfy the needs, improved speed, increased density, and reduced power consumption need to be realized within a limited package space. In line with the needs, the integration degree of the semiconductor memory has been improved through scaling-down for reducing the critical dimension of the semiconductor memory. However, recently, the scaling-down has reached the limit of reducing the critical dimension. As a solution for the limit, stack package technology is actively developed. This 3 dimensional package stack technology may improve the integration degree within the limited space because two or more chips or dies are vertically stacked in a small area.
FIG. 1 is a schematic sectional view illustrating the TSV in accordance with a prior art.
FIG. 1 (A) shows a normally formed TSV of a semiconductor chip. Referring to FIG. 1 (A), a path penetrating a wafer layer is formed and a metal layer made of metallic materials is formed in the path. An insulating layer made of, for example, oxide is formed on the TSV in order to insulate the metal layer and the wafer layer from each other.
FIGS. 1 (B) and 1 (C) show abnormally formed TSVs. The metal layer is not normally formed in a path surrounded by the insulating layer. According to unexpected variation of process conditions for generating a TSV, the metal layer may be incompletely formed in a process of forming the metal layer. That is, as shown in FIG. 1 (B), an open type gap is formed in an interface where the metal layer and a metal electrode are coupled. In this case of FIG. 1 (B), the TSV cannot transfer a signal because a current path is not formed between electrodes. As shown in (C), a void type gap is formed within the metal layer. In this case of FIG. 1 (C), a current path between electrodes may be formed, but the current path has a high resistance attributable to the void type gap. As a result, the TSV cannot transfer a signal stably.
FIG. 2 is a schematic sectional view illustrating the TSV in a plurality of stacked chips in accordance with a prior art.
Referring to FIG. 2, a first chip 120 and a second chip 140, in each of which corresponding TSVs are formed, are coupled. Bumps electrically coupled with the TSV are formed at both ends of each of the TSVs.
FIGS. 2 (A) and 2 (B) show abnormally formed bumps, which is a process error. As shown in FIG. 2 (A), a bump coupled with a TSV of the second chip 140 is not aligned with a bump coupled with a TSV of the first chip 120. As shown in FIG. 2 (B), a bump is not formed at a TSV of the second chip 140. As a result, referring to FIGS. 2 (A) and 2(B), the bumps coupled with the TSVs of the first chip 120 and the second chip 140 are not electrically coupled or the bumps have high resistance although they are electrically coupled. Therefore, a signal cannot be normally communicated because an AC signal transfer characteristic of a TSV is greatly deteriorated.
For this reason, it may be desirable to determine abnormality of the AC signal transfer characteristic of a TSV after packaging the stacked chips. This is because a chip may not operate normally when the AC signal transfer characteristic of a TSV is deteriorated although the direct current (DC) signal transfer characteristic of the TSV is normal. In order to meet the necessity, there is a need for a circuit for determining abnormality of the AC signal transfer characteristic of a TSV after packaging the stacked chips.